Northcape Capability Resolver Cache
Description
Northcape is a novel least-privilege byte-granular capability-based memory access control scheme for software and hardware devices, developed at the research group. As Northcape currently targets real-time systems only, it does not cache capability metadata table entries. Thus, for every capability lookup, it needs to perform n memory requests (with n being the hierarchie height). This is akin to page-table walking in paging-based memory systems. While this is acceptable (and intended behavior) for real-time systems, general-purpose systems might be bottlenecked by the memory accesses. CPUs use the equivalent problem in paging with a translation lookaside buffer (TLB), a small cache that speeds up page table walking by mapping virtual to physical addresses. Analogously, the Northcape Capability Resolver could benefit from a cache.
Outline
- Investigate the performance impact of lookups in the capability resolver empirically using benchmarks
- Implement a cache adapter in the resolver
- Evaluate different cache size parameters and replacement strategies
- Implement flushing the cache in coordination with the operations module
Intended Scope
Bachelor thesis
References / Extra Material
Northcape Paper: https://cispa.de/en/research/publications/79232-work-in-progress-northcape-embedded-real-time-capability-based-addressing
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